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drm/amdgpu/swsmu: add SMU mailbox registers in SMU context

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So we can eventaully use them in the common smu code for
accessing the SMU mailboxes without needing a lot of
per asic logic in the common code.

Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher 2022-05-26 11:55:36 -04:00
commit da1db031cd
17 changed files with 86 additions and 0 deletions
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