drm/i915/dsb: Nuke the MMIO->indexed register write logic

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We've determined that indexed DSB writes are only faster
than MMIO writes when writing the same register ~5 or more
times. That seems very unlikely to happen in any other case
than when using indexed LUT registers. Simplify the code
by removing the MMIO->indexed write conversion logic and
just emit the instruction as an indexed write from the get go.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241120164123.12706-4-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

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Ville Syrjälä 2024-11-20 18:41:22 +02:00

parent 2504a316b3

commit da5bb8974c

1 changed files with 14 additions and 44 deletions

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drivers/gpu/drm/i915/display/intel_dsb.c

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