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drm/amd/powerplay: add the hw manager for vega20 (v3)
hwmgr is the interface for the driver to setup state structures which are used by the smu for managing the power state. v2: squash in fixes: - update set_watermarks_for_clocks_ranges to use common code - drop unsupported apis - correct MAX_REGULAR_DPM_NUMBER value - multimonitor fixes - add check for vbios pptable version - revise dpm table setup - init fclk dpm state - Remove unused definition in vega20_hwmgr - support power limit setup - enable vega20 to honour DAL clock limits - comment out dump_table debugging v3: switch to SOC15 register access macros Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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