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ARM: dts: DRA7: change address-cells and size-cells

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DRA7 SoC has the capability to support DDR memory upto 4GB. In order to
represent this in memory dt node, the address-cells and size cells
should be 2. So, changing the address-cells and size-cells to 2 and
updating the memory nodes accordingly.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Lokesh Vutla 2016-02-24 15:41:04 +05:30 • committed by Tony Lindgren
commit dae320ec31
5 changed files with 14 additions and 14 deletions
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