drm/i915: Forcewake Register Range changes for CHV

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According to updated BSpec, Render/Common/media Wells register range changed.
Updating the same to match the spec and avoid extra forcewake for none
forcewake range.

v2: Update media forcewake range (Ville)

Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Deepak S 2014-12-11 21:42:49 +05:30 • committed by Daniel Vetter

parent f915084edc

commit db5ff4ac97

1 changed files with 4 additions and 7 deletions

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drivers/gpu/drm/i915/intel_uncore.c

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