ixgbe: Clear head write-back registers on VF reset

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The Tx head write-back registers are not cleared during an FLR or VF reset.
As a result a configuration that had head write-back enabled can leave the
registers set after the driver is unloaded.  If the next driver loaded doesn't
use the write-back registers this can lead to a bad configuration where
head write-back is enabled, but the driver didn't request it.

To avoid this situation the PF should be resetting the Tx head write-back
registers when the VF requests a reset.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

...

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Alexander Duyck 2014-01-15 17:38:41 -08:00 • committed by David S. Miller

parent 87397379d5

commit dbf231af81

2 changed files with 17 additions and 0 deletions

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9

drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c

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8

drivers/net/ethernet/intel/ixgbe/ixgbe_type.h

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