drm/msm/dpu: Configure CWB in writeback encoder

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Cache the CWB block mask in the DPU virtual encoder and configure CWB
according to the CWB block mask within the writeback phys encoder

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/637501/
Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-8-a44c293cf422@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

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Jessica Zhang 2025-02-14 16:14:31 -08:00 • committed by Dmitry Baryshkov

parent 5008375443

commit dd331404ac

3 changed files with 83 additions and 3 deletions

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75

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

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7

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

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4

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c

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