drm/amd/display: Adjust vblank_nom policy for HW SDP tranmission reqs

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[Why]
The requirement is that VSTARTUP has to come before vsync, line 0.
This means that the VSTARTUP has to be in the blank front porch.

The current implementation in DML2.1 does meet this requirement by
adjusting vblank_nom to the full vblank_avail but this has two
undesirable side effects:

1. When vblank is nominal this pushes VUPDATE on the line after VBLANK
   start. For Replay this gives only 1 line worth of time to program the
   SDP and blank the DPG. If we miss this window then we have to wait
   an entire frame before we can retry IPX entry. Residency is impacted.

2. The prefetch schedule is suboptimal. Instead of leveraging a very
   long vblank for power we wake early and block c-state earlier.

[How]
Use the same policy as prior ASIC - clamp the vblank_nom adjustment to
be the maximum of vblank_nom or the size of the back porch + 2 lines.
The back porch includes the vsync width in it in the calculation.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Nicholas Kazlauskas 2026-08-14 15:44:04 -04:00 • committed by Alex Deucher

parent 413e05b9ce

commit dd67db7d28

1 changed files with 16 additions and 4 deletions

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drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

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