RISC-V: KVM: make CY, TM, and IR counters accessible in VU mode

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Those applications that run in VU mode and access the time CSR cause
a virtual instruction trap as Guest kernel currently does not
initialize the scounteren CSR.

To fix this, we should make CY, TM, and IR counters accessibile
by default in VU mode (similar to OpenSBI).

Fixes: a33c72faf2 ("RISC-V: KVM: Implement VCPU create, init and
destroy functions")
Cc: stable@vger.kernel.org
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>

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Mayuresh Chitale 2022-01-31 16:33:07 +05:30 • committed by Anup Patel

parent 6455317e4d

commit de1d7b6a51

1 changed files with 4 additions and 0 deletions

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arch/riscv/kvm/vcpu.c

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