x86: implement support to synchronize RDTSC through MFENCE on AMD CPUs

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According to AMD RDTSC can be synchronized through MFENCE.
Implement the necessary CPUID bit for that.

Cc: andreas.herrmann3@amd.com
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

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Andi Kleen 2008-01-30 13:32:37 +01:00 • committed by Ingo Molnar

parent 27efeb6771

commit de4218634e

3 changed files with 6 additions and 2 deletions

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3

arch/x86/kernel/cpu/amd.c

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4

arch/x86/kernel/setup_64.c

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1

include/asm-x86/cpufeature.h

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