sh: clock-cpg div4 set_rate() shift fix

Make sure the div4 bitfield is shifted according
to the enable_bit value in sh_clk_div4_set_rate().

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Magnus Damm 2010-02-19 09:12:00 +00:00 • committed by Paul Mundt
commit de7ca2144c