edac: i5100 ack error detection register after each read

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If I only ack the detection register after a error have been detected
I'm unable to reliably detect errors. I have verified this behavior
using both an error injection DIMM and software to inject errors.

I can't find any documentation supporting this behavior in Intel 5100
Memory Controller Hub Chipset, see 1. So this is all based on
experimentation.

[1] Intel® 5100 Memory Controller Hub Chipset
    http://www.intel.com/content/dam/doc/datasheet/5100-
	memory-controller-hub-chipset-datasheet.pdf

Signed-off-by: Niklas Söderlund <niklas.soderlund@ericsson.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

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Niklas Söderlund 2011-12-09 13:12:15 -03:00 • committed by Mauro Carvalho Chehab

parent b6378cb3e5

commit df95e42e1f

1 changed files with 4 additions and 7 deletions

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drivers/edac/i5100_edac.c

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