drm/i915/vrr: Restrict CMRR enable condition to VRR-TG-default platforms

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CMRR is currently advertised on all HAS_CMRR platforms, but it depends
on the VRR timing generator being the default timing generator, which
currently only applies to DISPLAY_VER >= 30.

Gate the CMRR enable condition and readout accordingly so CMRR is only
reported on supported platforms.

No functional change.

--v2:
- Create a separate function to check if CMRR possible

--v3:
- Simplify commit message (Chaitanya)
- Remove redundant outer parenthesis (Chaitanya)

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260730105919.3913412-3-mitulkumar.ajitkumar.golani@intel.com

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Mitul Golani 2026-07-30 16:29:09 +05:30 • committed by Suraj Kandpal

parent 8565e6cfb8

commit dfd1495664

1 changed files with 9 additions and 3 deletions

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drivers/gpu/drm/i915/display/intel_vrr.c

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