RISC-V updates for v5.4-rc4

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Some RISC-V fixes for v5.4-rc4:
 
 - Fix the virtual memory layout so the fixaddr region doesn't overlap
   with other regions.  (This was originally intended to go in as part
   of an earlier patch, but I inadvertently dropped it during a
   rebase.)
 
 - Add the DT chosen/stdout-path property to the HiFive Unleashed DT
   file.  This is so "earlycon" can be specified with no arguments on
   the kernel command line, and the correct UART will be automatically
   selected.
 
 And two cleanup patches:
 
 - Simplify the code in our breakpoint trap handler.
 
 - Drop a comment in our TLB flush code that has caused some confusion.
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Merge tag 'riscv/for-v5.4-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Paul Walmsley:
 "Some RISC-V fixes:

   - Fix the virtual memory layout so the fixaddr region doesn't overlap
     with other regions. (This was originally intended to go in as part
     of an earlier patch, but I inadvertently dropped it during a
     rebase)

   - Add the DT chosen/stdout-path property to the HiFive Unleashed DT
     file. This is so "earlycon" can be specified with no arguments on
     the kernel command line, and the correct UART will be automatically
     selected.

  And two cleanup patches:

   - Simplify the code in our breakpoint trap handler.

   - Drop a comment in our TLB flush code that has caused some
     confusion"

* tag 'riscv/for-v5.4-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  RISC-V: fix virtual address overlapped in FIXADDR_START and VMEMMAP_START
  riscv: tlbflush: remove confusing comment on local_flush_tlb_all()
  riscv: dts: HiFive Unleashed: add default chosen/stdout-path
  riscv: remove the switch statement in do_trap_break()

...

This commit is contained in:

Linus Torvalds 2019-10-18 22:26:18 -04:00

parent b9959c7a34 5bf4e52ff0

commit dfdcff3215

4 changed files with 20 additions and 23 deletions

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1

arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts

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16

arch/riscv/include/asm/pgtable.h

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4

arch/riscv/include/asm/tlbflush.h

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22

arch/riscv/kernel/traps.c

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