RISC-V Devicetrees for v6.6-final

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A single fix for the Starfive VisionFive 2 platform so that chip select
 for SPI matches the vendor documentation.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Merge tag 'riscv-dt-for-v6.6-final' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

RISC-V Devicetrees for v6.6-final

A single fix for the Starfive VisionFive 2 platform so that chip select
for SPI matches the vendor documentation.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.6-final' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: starfive: visionfive 2: correct spi's ss pin
  riscv: dts: starfive: visionfive 2: Fix uart0 pins sort order
  riscv: dts: starfive: visionfive 2: Enable usb0
  riscv: dts: starfive: fix NOR flash reserved-data partition size

Link: https://lore.kernel.org/r/20231015-outmatch-tragedy-228f91d396b5@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

...

This commit is contained in:

Arnd Bergmann 2023-10-16 10:22:11 +02:00

parent 37d01395d9 cf98fe6b57

commit e084a305aa

1 changed files with 27 additions and 26 deletions

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arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi

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