clk: xilinx: Optimize divisor search in clk_wzrd_get_divisors_ver()

Browse source

Optimise the clock wizard divisor calculation by eliminating the innermost
loop over output divider o. Earlier there was an error that is returned
if the WZRD_MIN_ERR is not achieved error is returned now it computes
the best possible frequency.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

...

This commit is contained in:

Shubhrajyoti Datta 2025-07-29 10:38:42 +05:30 • committed by Stephen Boyd

parent 8f5ae30d69

commit e0a94c6bb5

No known key found for this signature in database

GPG key ID: AD028897C6E49525

1 changed files with 18 additions and 14 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

30

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

View file