x86, pmem: Fix cache flushing for iovec write < 8 bytes

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commit 8376efd31d upstream.

Commit 11e63f6d92 added cache flushing for unaligned writes from an
iovec, covering the first and last cache line of a >= 8 byte write and
the first cache line of a < 8 byte write.  But an unaligned write of
2-7 bytes can still cover two cache lines, so make sure we flush both
in that case.

Fixes: 11e63f6d92 ("x86, pmem: fix broken __copy_user_nocache ...")
Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

...

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Ben Hutchings 2017-05-09 18:00:43 +01:00 • committed by Greg Kroah-Hartman

parent e65c6aa108

commit e0c871792c

1 changed files with 1 additions and 1 deletions

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arch/x86/include/asm/pmem.h

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