drm/i915/ltphy: Read PHY_VDR_0_CONFIG register

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Read PHY_VDR_0_CONFIG to check if there is any change in the register and
decide based on that if P2P sequence to change the data rate of LT PHY
are required or not. This scenario only happens if the requested mode
uses 1.62Gbps with DP mode since LT PHY defaults to this mode if
any other mode is requested we need to follow the whole sequence.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patch.msgid.link/20251101032513.4171255-8-suraj.kandpal@intel.com

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This commit is contained in:

Suraj Kandpal 2025-11-01 08:54:55 +05:30

parent fc9be0a10c

commit e1455196ad

3 changed files with 123 additions and 25 deletions

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3

drivers/gpu/drm/i915/display/intel_cx0_phy.c

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1

drivers/gpu/drm/i915/display/intel_cx0_phy.h

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144

drivers/gpu/drm/i915/display/intel_lt_phy.c

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