x86, apic: Handle a bad TSC more gracefully

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commit b47dcbdc51 upstream.

If the TSC is unusable or disabled, then this patch fixes:

 - Confusion while trying to clear old APIC interrupts.
 - Division by zero and incorrect programming of the TSC deadline
   timer.

This fixes boot if the CPU has a TSC deadline timer but a missing or
broken TSC.  The failure to boot can be observed with qemu using
-cpu qemu64,-tsc,+tsc-deadline

This also happens to me in nested KVM for unknown reasons.
With this patch, I can boot cleanly (although without a TSC).

Signed-off-by: Andy Lutomirski <luto@amacapital.net>
Cc: Bandan Das <bsd@redhat.com>
Link: http://lkml.kernel.org/r/e2fa274e498c33988efac0ba8b7e3120f7f92d78.1413393027.git.luto@amacapital.net
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>

...

This commit is contained in:

Andy Lutomirski 2014-10-15 10:12:07 -07:00 • committed by Luis Henriques

parent d8c0acc0ec

commit e179c7c731

2 changed files with 6 additions and 3 deletions

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4

arch/x86/kernel/apic/apic.c

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5

arch/x86/kernel/tsc.c

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