drm/amdgpu: Skip access SDMA0_F32_CNTL in sdma_v6_0_enable under SRIOV

Browse source

[Why]
SDMA0_F32_CNTL is a PF_only regitser which will be blocked by L1.
RLCG will not program the register as well.

[How]
Skip to program SDMA0_F32_CNTL under SRIOV VF.

Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Yifan Zha 2022-10-25 14:46:11 +08:00 • committed by Alex Deucher

parent 47a7470bb2

commit e1a29b28e7

1 changed files with 3 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

3

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

View file