arm64: dts: qcom: glymur: add CPU capacity-dmips-mhz

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The Glymur SoC has two distinct core types within the same Oryon
microarchitecture generation:

  - qcom,oryon-2-2 (cpu0-cpu5, cluster 0)
  - qcom,oryon-2-1 (cpu6-cpu11, cluster 1; cpu12-cpu17, cluster 2)

Without capacity-dmips-mhz the Energy Aware Scheduler treats all 18
cores as equal, leading to suboptimal task placement and frequency
selection. In particular, heavy tasks may be pinned to cluster 0  driving
them to maximum frequency/voltage while cluster 1/2 sit idle.

Fix this by using distinct capacity-dmips-mhz numbers.
Values are derived from DPC (DMIPS-per-clock) measurements at the
825.6 MHz nominal operating point:

oryon-2-2: 1024  (normalised baseline)
oryon-2-1: 1372  (ratio ~1.34x vs oryon-2-2)

Signed-off-by: Pradyot Kumar Nayak <pradyot.nayak@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260706-add-cpu-capacity-dmips-mhz-v1-1-85deced44b20@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

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Pradyot Kumar Nayak 2026-07-06 12:25:59 +05:30 • committed by Bjorn Andersson

parent 67be5d3da3

commit e1a6af9411

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