drm/amd/display: Clean up for DCN1 clock debug logging

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[Why]
To prepare for clock debug logging. With the exception of removing
max_supported_dppclk_khz from logs, there are no functional changes.

[How]
Add clk_bypass struct and clean up buffer logic

Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Su Chung <Su.Chung@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Fatemeh Darbehani 2018-10-30 11:32:40 -04:00 • committed by Alex Deucher

parent e96938a09d

commit e210167522

5 changed files with 32 additions and 23 deletions

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4

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c

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6

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.h

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39

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

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4

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c

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2

drivers/gpu/drm/amd/display/dc/dm_pp_smu.h

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