drm/i915/display: harden masks in HSW_AUD_PIN_ELD_CP_VLD macros

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HSW_AUD_PIN_ELD_CP_VLD has a 4-bit field per transcoder for
TRANSCODER_A..TRANSCODER_D only (bits 0..15).  Any other transcoder
value (TRANSCODER_EDP, TRANSCODER_DSI_*, INVALID_TRANSCODER) is not
valid here.

This is not a problem with the current implementation, because trans
is always valid when these macros are called, but it's more robust to
mask the index to the low 2 bits so the shift is always well-defined.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
Link: https://patch.msgid.link/20260609095525.570614-2-luciano.coelho@intel.com
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>

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Luca Coelho 2026-06-09 12:52:36 +03:00

parent eaed815ca3

commit e26c92e712

1 changed files with 12 additions and 4 deletions

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drivers/gpu/drm/i915/display/intel_audio_regs.h

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