x86/tsc: Add missing Cherrytrail frequency to the table

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Intel Cherrytrail is based on Airmont core so MSR_FSB_FREQ[2:0] = 4
means that the CPU reference clock runs at 80MHz.  Add this missing
frequency to the table.

Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Link: http://lkml.kernel.org/r/87y47gty89.fsf@intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

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Jeremy Compostella 2016-05-11 17:23:34 +02:00 • committed by Thomas Gleixner

parent 9a7a076e8e

commit e2724e9d96

1 changed files with 3 additions and 0 deletions

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arch/x86/kernel/tsc_msr.c

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