V4L/DVB (13090): cx25840: Init PLLs properly for CX2388[578] A/V cores

The SYS and AUX PLLs need to be initialized to different values based on
the chip: CX23885, CX23887, CX23888, as each uses a different crystal
frequency: 28.6363 MHz, 25.0 MHz, 50.0 MHz.

Signed-off-by: Andy Walls <awalls@radix.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Andy Walls 2009-09-27 00:00:48 -03:00 • committed by Mauro Carvalho Chehab
commit e283d78083