drm/amd/display: Add missing DCN30 registers and fields for OTG_CRC_CNTL2

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[Why]
When enabling the debugfs for CRC capture we hit assertions caused by
register address and field masks and shifts missing.

[How]
We want these registers programmed, so add in the SRI/SF entries for
this register.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Nicholas Kazlauskas 2020-07-09 16:21:37 -04:00 • committed by Alex Deucher

parent 4462282a72

commit e2f60fd8ba

1 changed files with 9 additions and 0 deletions

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drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.h

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