drm/i915/cx0: Add MTL+ .enable_clock/.disable clock hooks on DDI

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To enable pll clock on DDI move part of the pll enabling
sequence into a ddi clock enabling function.

Simililarly, do the same for pll disabling sequence.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20251117104602.2363671-30-mika.kahola@intel.com

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This commit is contained in:

Mika Kahola 2025-11-17 12:45:59 +02:00

parent b800af732c

commit e32518d012

5 changed files with 64 additions and 16 deletions

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34

drivers/gpu/drm/i915/display/intel_cx0_phy.c

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11

drivers/gpu/drm/i915/display/intel_cx0_phy.h

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6

drivers/gpu/drm/i915/display/intel_ddi.c

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25

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

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4

drivers/gpu/drm/i915/display/intel_lt_phy.c

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