drm/amd/amdgpu: Fix SQ_DEBUG_STS_GLOBAL* registers

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Forgot to subtract the SOC15 IP offsetand add the BASE_IDX values.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Tom St Denis 2020-06-15 12:17:46 -04:00 • committed by Alex Deucher

parent d31bdabbf5

commit e3569fab49

5 changed files with 26 additions and 13 deletions

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6

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

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9

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

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