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drm/amdkfd: allow CWSR grace period of 0 on supported firmware
The debugger sets the CWSR grace period via AMDKFD_IOC_DBG_TRAP and may request a value of 0. An earlier change clamped 0 to 1 unconditionally because most firmware revisions locked up when given an infinite (0) grace period. Firmware has since been fixed on most ASICs, so gate the clamp on ASIC type and MEC firmware version and allow 0 where the running firmware is known to handle it. Navi3x and MI350 support 0 in every firmware revision and need no version check. MI100 never received the firmware fix and is kept clamped. Any unlisted or future ASIC defaults to the safe (clamped) behaviour. Signed-off-by: William Palacek <William.Palacek@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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