PCI: mvebu: Fix support for bus mastering and PCI_COMMAND on emulated bridge

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According to PCI specifications bits [0:2] of Command Register, this should
be by default disabled on reset. So explicitly disable these bits at early
beginning of driver initialization.

Also remove code which unconditionally enables all 3 bits and let kernel
code (via pci_set_master() function) to handle bus mastering of PCI Bridge
via emulated PCI_COMMAND on emulated bridge.

Adjust existing functions mvebu_pcie_handle_iobase_change() and
mvebu_pcie_handle_membase_change() to handle PCI_IO_BASE and PCI_MEM_BASE
registers correctly even when bus mastering on emulated bridge is disabled.

Link: https://lore.kernel.org/r/20211125124605.25915-7-pali@kernel.org
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

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Pali Rohár 2021-11-25 13:45:56 +01:00 • committed by Lorenzo Pieralisi

parent 319e6046bd

commit e42b855837

1 changed files with 32 additions and 20 deletions

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drivers/pci/controller/pci-mvebu.c

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