PCI/ATS: Cache PRI PRG Response PASID Required bit

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The PRG Response PASID Required bit in the PRI Capability is read-only.
Read it once when we enumerate the device and cache the value so we don't
need to read it again.

Based-on-patch-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

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Bjorn Helgaas 2019-10-09 16:07:51 -05:00

parent 751035b8dc

commit e5adf79a1d

2 changed files with 11 additions and 13 deletions

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23

drivers/pci/ats.c

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1

include/linux/pci.h

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