KVM: vmx/pmu: Emulate legacy freezing LBRs on virtual PMI

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The current vPMU only supports Architecture Version 2. According to
Intel SDM "17.4.7 Freezing LBR and Performance Counters on PMI", if
IA32_DEBUGCTL.Freeze_LBR_On_PMI = 1, the LBR is frozen on the virtual
PMI and the KVM would emulate to clear the LBR bit (bit 0) in
IA32_DEBUGCTL. Also, guest needs to re-enable IA32_DEBUGCTL.LBR
to resume recording branches.

Signed-off-by: Like Xu <like.xu@linux.intel.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Message-Id: <20210201051039.255478-9-like.xu@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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This commit is contained in:

Like Xu 2021-02-01 13:10:36 +08:00 • committed by Paolo Bonzini

parent 9254beaafd

commit e6209a3bef

5 changed files with 39 additions and 3 deletions

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5

arch/x86/kvm/pmu.c

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1

arch/x86/kvm/pmu.h

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4

arch/x86/kvm/vmx/capabilities.h

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30

arch/x86/kvm/vmx/pmu_intel.c

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2

arch/x86/kvm/vmx/vmx.c

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