arm64: dts: rockchip: assign clock rate for cpll child clocks on rk3399

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These clocks do not assign default clock frequency, and use the
default cru register value to get frequency, so if cpll increase
frequency, these clocks also increase their frequency, that may
exceed their signed off frequency. So assign default clock for
them to avoid it.

NOTE: on none of the boards currently in mainline do we expect
CPLL to be anything other than 800 MHz, but some future boards
might have it. It's still good to be explicit about the clock
rates to make diffing against future boards easier and also to
rely less on BIOS muxing.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

...

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Lin Huang 2018-03-20 10:06:29 +08:00 • committed by Heiko Stuebner

parent 7c573e3741

commit e702e13f0b

2 changed files with 16 additions and 6 deletions

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arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi

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arch/arm64/boot/dts/rockchip/rk3399.dtsi

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