drm/i915: Fix tiling pitch handling on 8xx.

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The pitch field is an exponent on pre-965, so we were rejecting buffers
on 8xx that we shouldn't have.  915 got lucky in that the largest legal
value happened to match (8KB / 512 = 0x10), but 8xx has a smaller tile width.
Additionally, we programmed that bad value into the register on 8xx, so the
only pitch that would work correctly was 4096 (512-1023 pixels), while others
would probably give bad rendering or hangs.

Signed-off-by: Eric Anholt <eric@anholt.net>

fd.o bug #20473.

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This commit is contained in:

Eric Anholt 2009-05-26 17:44:56 -07:00

parent cd86a536c8

commit e76a16deb8

3 changed files with 17 additions and 6 deletions

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6

drivers/gpu/drm/i915/i915_gem.c

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14

drivers/gpu/drm/i915/i915_gem_tiling.c

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3

drivers/gpu/drm/i915/i915_reg.h

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