clk: samsung: exynos5420: Add clocks for CMU_CDREX domain

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This patch adds the mux/divider clocks for CMU_CDREX (DRAM Express
Controller) which generates the clocks for DRAM and NoC (Network on Chip)
bus.  There is differnet source of MUX_MX_MSPLL_CCORE between exynos5420
and exynos5422, so each MUX_MX_MSPLL_CCORE uses the different parent source
group.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

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Chanwoo Choi 2016-08-25 15:57:17 +09:00 • committed by Sylwester Nawrocki

parent ba9d05d972

commit e867e8fa82

1 changed files with 37 additions and 0 deletions

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drivers/clk/samsung/clk-exynos5420.c

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