clk: renesas: rcar-gen3: Avoid double table iteration in SD .set_rate()

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The .set_rate() callback for the SD clocks is always called with a valid
clock rate, returned by .round_rate().  Hence there is no need to
iterate through the divider table twice: once to repeat the work done by
.round_rate(), and a second time to find the corresponding divider
entry.

Just iterate once, looking for the divider that matches the passed clock
rate.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20190830134515.11925-4-geert+renesas@glider.be

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Geert Uytterhoeven 2019-08-30 15:45:10 +02:00

parent b5dea62d34

commit e8adb3a0f7

1 changed files with 3 additions and 3 deletions

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drivers/clk/renesas/rcar-gen3-cpg.c

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