clk: tegra: dfll: Make code more comprehensible

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Rename some variables and structure fields to make the code more
comprehensible. Also change the prototype of internal functions to be
more in line with the OPP core functions.

Signed-off-by: Thierry Reding <treding@nvidia.com>

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Thierry Reding 2016-04-08 15:09:56 +02:00

parent 27ed2f7e7c

commit e8f6a68c50

3 changed files with 37 additions and 41 deletions

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11

drivers/clk/tegra/clk-tegra124-dfll-fcpu.c

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57

drivers/clk/tegra/cvb.c

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12

drivers/clk/tegra/cvb.h

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