drm/msm/dpu: fix blend setup for DMA4 and DMA5 layers

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SM8550 uses new register to map SSPP_DMA4 and SSPP_DMA5 units to blend
stages. Add proper support for this register to allow using these two
planes for image processing.

Fixes: efcd010772 ("drm/msm/dpu: add support for SM8550")
Cc: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550
Patchwork: https://patchwork.freedesktop.org/patch/518481/
Link: https://lore.kernel.org/r/20230116063316.728496-1-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

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This commit is contained in:

Dmitry Baryshkov 2023-01-16 08:33:14 +02:00

parent 00feff8f12

commit e92a4ae198

3 changed files with 30 additions and 6 deletions

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15

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

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2

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

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19

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

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