V4L/DVB (11326): mt9m001: fix advertised pixel clock polarity

MT9M001 datasheet says, that the data is ready on the falling edge of the pixel
clock, but the driver wrongly sets the SOCAM_PCLK_SAMPLE_RISING flag. Changing
this doesn't seem to produce any visible difference, still, it is better to
comply to the datasheet.

Reported-by: Sascha Oppermann <oppermann@garage-computers.com>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Guennadi Liakhovetski 2009-03-31 03:44:22 -03:00 • committed by Mauro Carvalho Chehab
commit e951cbf20c