x86/cpu: Enable STIBP on AMD if Automatic IBRS is enabled

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commit fd470a8bee upstream.

Unlike Intel's Enhanced IBRS feature, AMD's Automatic IBRS does not
provide protection to processes running at CPL3/user mode, see section
"Extended Feature Enable Register (EFER)" in the APM v2 at
https://bugzilla.kernel.org/attachment.cgi?id=304652

Explicitly enable STIBP to protect against cross-thread CPL3
branch target injections on systems with Automatic IBRS enabled.

Also update the relevant documentation.

Fixes: e7862eda30 ("x86/cpu: Support AMD Automatic IBRS")
Reported-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20230720194727.67022-1-kim.phillips@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

...

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Kim Phillips 2023-07-20 14:47:27 -05:00 • committed by Greg Kroah-Hartman

parent fdcd4b0d51

commit e96954065d

2 changed files with 16 additions and 10 deletions

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11

Documentation/admin-guide/hw-vuln/spectre.rst

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15

arch/x86/kernel/cpu/bugs.c

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