perf/x86/intel: Update event constraints and cache_extra_regsfor MTL

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Update perf hard-coded event constraints and cache_extra_regs[] for
Meteor Lake according to the latest MTL perfmon events (V1.21).

MTL P-core (redwoodcove) inherits same perf events list from previous
generation (Goldencove), but the E-core (Crestmont) brings some
difference on the perf event list comparing with Gracemont. So apply
the changes for Crestmont core.

MTL perfmon events:
https://github.com/intel/perfmon/blob/main/MTL/events/meteorlake_redwoodcove_core.json
https://github.com/intel/perfmon/blob/main/MTL/events/meteorlake_crestmont_core.json

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20260515061143.338553-6-dapeng1.mi@linux.intel.com

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Dapeng Mi 2026-05-15 14:11:37 +08:00 • committed by Peter Zijlstra

parent 4ef863352b

commit e99fb45436

3 changed files with 34 additions and 2 deletions

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27

arch/x86/events/intel/core.c

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7

arch/x86/events/intel/ds.c

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2

arch/x86/events/perf_event.h

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