pinctrl: renesas: r8a77995: Add bias pinconf support

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Implement support for pull-up (most pins, excl. DU_DOTCLKIN0) and
pull-down (most pins, excl. JTAG) handling for the R-Car D3 SoC, using
some parts from the common R-Car bias handling, which requires making
rcar_pin_to_bias_reg() public.

R-Car D3 needs special handling for the NFRE# (GP_3_0) and NFWE#
(GP_3_1) pins.  Unlike all other pins, they are controlled by different
bits in the LSI pin pull-up/down control register (PUD2) than in the LSI
pin pull-enable register (PUEN2).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/04aad2b0bf82a32fb08e5e21e4ac1fb03452724f.1625064076.git.geert+renesas@glider.be

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Geert Uytterhoeven 2021-06-30 16:50:43 +02:00

parent 7ebaa41047

commit e9d66bdbc5

3 changed files with 316 additions and 9 deletions

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320

drivers/pinctrl/renesas/pfc-r8a77995.c

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2

drivers/pinctrl/renesas/pinctrl.c

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3

drivers/pinctrl/renesas/sh_pfc.h

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