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Allwinner clock changes for 6.13
- Added sigma-delta modulation settings for audio PLL on the H616 SoC, crucial for accurate audio reproduction - Constified |struct ccu_reset_map| throughout the sunxi-ng clk drivers - Fixed the audio PLL divider preset on the D1 SoC - Switched to of_property_present() for checking DT property presence -----BEGIN PGP SIGNATURE----- iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmcrlegOHHdlbnNAY3Np ZS5vcmcACgkQOJpUIZwPJDD1OxAAiAxDbP29tc6Ms0+UegREMohw8IcutLPuZnRy 114JTIEm0yGfgYYBGABIvHD/dmTUTdDs3n5SnmzKmBQHYZmNB28aPSdLjc1rvyGu BPCQE7VIMKTbw8APwNi50cV7w7cZqvTa2UK3L9iE8duG+i/iTgb6zyF7C4tYH9iU aYwqHtA4CP7EICl+6EUL09jJ6tJv1s5e/An/nZ8Dv+u/ZxWEcch/runqxQgweftZ xINYU/a+k5HK+KcTgHSCaePwPa59Ohte942hsWSCLT2HKAJJ5WmrU0ZSJbu8nTBF Z2kaGu0QozqJf+Xcd8S7INz69A834Ntv31A0MrDQPFG5wxhhcZofr8EIonZQUIZ4 lmArKMECUDbwt5YcGrXq0rJTwHcNu4M+SCuwOW85mmpQD8zZa2fcXcpGexkyPwnA wPRhk3L/7SujREYlq2QdlI3Az/kw7ksdOwSZMqudecXPJ5Zyj10Uw6/OFhhMWhgE 0SsKhXNysAEknJdaizIxXUNwhIg1FM3NWprbjMJfaXDg8ffOsvXYVwLhN34d+60Q 6PfQ73wvzdTZF1P4yd5fInvRtGOC77dBh8pTzdgOHseCA18h4o8Ta5X07t8EnKVX fEaD0K5KvAVO5FYS059bFgdXfPpl67Q1iH4E4DZn68loiiwyXyRfpKn1ggcJ+Uu1 6FDptXk= =pvKf -----END PGP SIGNATURE----- Merge tag 'sunxi-clk-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner Pull Allwinner clk driver updates from Chen-Yu Tsai: - Add sigma-delta modulation settings for audio PLL on the H616 SoC, crucial for accurate audio reproduction - Constify |struct ccu_reset_map| throughout the sunxi-ng clk drivers - Fix the audio PLL divider preset on the D1 SoC - Switch to of_property_present() for checking DT property presence * tag 'sunxi-clk-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: Use of_property_present() for non-boolean properties clk: sunxi-ng: d1: Fix PLL_AUDIO0 preset clk: sunxi-ng: Constify struct ccu_reset_map clk: sunxi-ng: h616: Add sigma-delta modulation settings for audio PLL
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