crypto: qat - add macro to write 64-bit values to registers

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Introduce the ADF_CSR_WR_LO_HI macro to simplify writing a 64-bit values
to hardware registers.

This macro works by splitting the 64-bit value into two 32-bit segments,
which are then written separately to the specified lower and upper
register offsets.

Update the adf_gen4_set_ssm_wdtimer() function to utilize this newly
introduced macro.

Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

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Suman Kumar Chakraborty 2025-03-10 16:15:40 +00:00 • committed by Herbert Xu

parent d2d072a313

commit ea3d35467b

2 changed files with 16 additions and 24 deletions

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10

drivers/crypto/intel/qat/qat_common/adf_accel_devices.h

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28

drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c

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