drm/msm/a6xx: Fix GMU firmware parser

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[ Upstream commit b4789aac9d ]

Current parser logic for GMU firmware assumes a dword aligned payload
size for every block. This is not true for all GMU firmwares. So, fix
this by using correct 'size' value in the calculation for the offset
for the next block's header.

Fixes: c6ed04f856 ("drm/msm/a6xx: A640/A650 GMU firmware path")
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/674040/
Message-ID: <20250911-assorted-sept-1-v2-2-a8bf1ee20792@oss.qualcomm.com>
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

...

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Akhil P Oommen 2025-09-11 02:14:05 +05:30 • committed by Greg Kroah-Hartman

parent 488f320632

commit ea48293df4

1 changed files with 4 additions and 1 deletions

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drivers/gpu/drm/msm/adreno/a6xx_gmu.c

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