drm/i915: Actually read out DPLL0 vco on skl from hardware

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Currently we're trying to guess which lcpll vco frequency is used
use based on the cdclk. That doesn't work for cdclk==540 since
both vco frequencies can generate a 540 Mhz output. Let's stop
guessing and just read the actual vco frequency from the
hardware.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463172100-24715-6-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>

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This commit is contained in:

Ville Syrjälä 2016-05-13 23:41:24 +03:00

parent a8ca493452

commit ea61791e59

2 changed files with 37 additions and 42 deletions

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73

drivers/gpu/drm/i915/intel_display.c

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6

drivers/gpu/drm/i915/intel_dpll_mgr.c

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