netxen: cache align register map table

Aligning register offset translation table imporves performance
on rx side.

Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Dhananjay Phadke 2009-04-07 22:50:48 +00:00 • committed by David S. Miller
commit ea7eaa39ff