perf vendor events intel: Add core event list for Alderlake-N

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Alderlake-N only has E-core, it has been moved to non-hybrid code path on
the kernel side, so add the cpuid for Alderlake-N separately.

Add core event list for Alderlake-N, it is based on the
ADL gracemont v1.16 JSON file.

https://github.com/intel/perfmon/tree/main/ADL/events/

Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20221124031441.110134-1-zhengjun.xing@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

...

This commit is contained in:

Zhengjun Xing 2022-11-24 11:14:38 +08:00 • committed by Arnaldo Carvalho de Melo

parent 765d4e497f

commit eafcbb6838

8 changed files with 1075 additions and 1 deletions

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330

tools/perf/pmu-events/arch/x86/alderlaken/cache.json

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18

tools/perf/pmu-events/arch/x86/alderlaken/floating-point.json

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26

tools/perf/pmu-events/arch/x86/alderlaken/frontend.json

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81

tools/perf/pmu-events/arch/x86/alderlaken/memory.json

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tools/perf/pmu-events/arch/x86/alderlaken/other.json

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533

tools/perf/pmu-events/arch/x86/alderlaken/pipeline.json

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47

tools/perf/pmu-events/arch/x86/alderlaken/virtual-memory.json

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3

tools/perf/pmu-events/arch/x86/mapfile.csv

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1 Family-model Version Filename EventType 2 GenuineIntel-6-(97|9A|B7|BA|BE|BF) GenuineIntel-6-(97|9A|B7|BA|BF) v1.15 alderlake core 3 GenuineIntel-6-BE v1.16 alderlaken core 4 GenuineIntel-6-(1C|26|27|35|36) v4 bonnell core 5 GenuineIntel-6-(3D|47) v26 broadwell core 6 GenuineIntel-6-56 v23 broadwellde core