clk: renesas: rzg2l: Add SDHI clk mux support

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Add SDHI clk mux support to select SDHI clock from different clock
sources.

As per HW manual, direct clock switching from 533MHz to 400MHz and
vice versa is not recommended. So added support for handling this
in mux.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211007111434.8665-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Biju Das 2021-10-07 12:14:33 +01:00 • committed by Geert Uytterhoeven

parent 27c9d7635d

commit eaff33646f

2 changed files with 130 additions and 0 deletions

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118

drivers/clk/renesas/rzg2l-cpg.c

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12

drivers/clk/renesas/rzg2l-cpg.h

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