selftests/powerpc/pmu/: Add interface test for mmcr0 exception bits

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The testcase uses "instructions" event to verify two bits(PMAE and PMAO)
in Monitor Mode Control Register 0 (MMCR0). At the time of interrupt,
pmae bit ( which enables performance monitor exception ) is expected to
be cleared and pmao (which indicates performance monitor alert) bit is
expected to be set in MMCR0. And testcases handles these checks.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
[mpe: Add error checking, drop GET_MMCR_FIELD, add to .gitignore]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220127072012.662451-10-kjain@linux.ibm.com

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Athira Rajeev 2022-01-27 12:50:01 +05:30 • committed by Michael Ellerman

parent 13307f9584

commit eb7aa044df

3 changed files with 63 additions and 1 deletions

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1

tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore vendored

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tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile

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59

tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr0_exceptionbits_test.c

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